The present invention relates to a method for roughening a surface of a semiconductor substrate.
In the technical field of semiconductor manufacturing, it is well known to produce dynamic random access memories (DRAMs) with memory cells including a selection transistor and a storage capacitor. Reducing the feature size drives the progress in semiconductor manufacturing. Accordingly, the number of functions disposed on a given area of a substrate can be increased.
As the surface area for a single memory cell decreases, the capacity of the storage capacitor is decreasing as well. For proper operation of the memory cell, a certain minimum capacity (typically in the order of 30 femto farad) is mandatory for the storage capacitor. If the capacity of the storage capacitor is too small, the charge stored in the storage capacitor is not sufficient to produce a detectable signal on the bit line when the selection transistor is opened. In such a case, the information stored in the memory cell is lost and the memory cell is not operating in the desired way.
Several ways exist in the prior art to overcome the problem of shrinking feature size. For example, a storage capacitor is formed in a deep trench to maintain a large capacitor area with a high capacity while using a small amount of the surface of the substrate. Another method to create a capacitor with a high capacity exists in a stacked capacitor disposed on the surface of the semiconductor substrate, above the selection transistor.
To increase the capacitor area, also existing in the prior art is the process of placing hemispherical grains on the electrodes of the capacitor. Hemispherical grains result in an increased capacitor area that increases the capacity. To form hemispherical grains, a polysilicon layer is deposited with a high roughness.
It is accordingly an object of the invention to provide a method for roughening a surface of a semiconductor substrate that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and that roughens a surface of a semiconductor substrate to increase the capacitor area.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a method for roughening a surface of a semiconductor substrate, including the steps of providing a semiconductor substrate having a surface, placing the semiconductor substrate in a furnace, introducing a process gas into the furnace, the process gas including oxygen and an inert gas selected from the group consisting of argon and nitrogen, maintaining an oxygen concentration in the furnace between approximately 0.1% and approximately 10%, and forming mesopores in the surface of the semiconductor substrate by annealing the substrate at a temperature between approximately 950xc2x0 C. and approximately 1200xc2x0 C.
The method according to the invention is applicable for example in DRAM technology for roughening the capacity area of a storage capacitor. The inventive process is intended to produce mesopores in the capacity area of the storage capacitor for enlarging the active area of the storage capacitor, resulting in an increased storage capacity. An advantage of the method for roughening the surface of a semiconductor substrate according to the invention is the elimination of additional etching gases such as chlorine or fluorine; as such gases are not necessary for the present invention. The forming of mesopores just uses process gases that are conventional for semiconductor manufacturing.
Advantageously, the invention increases the surface area and, hence, the capacity of the storage capacitor.
In accordance with another mode of the invention, the substrate is annealed at a temperature greater than 950xc2x0 C., preferably, at least 1000xc2x0 C. but less than 1200xc2x0 C., the temperature at which the substrate may be damaged. The annealing provides enough energy to start and to pursue the reaction.
In accordance with a further mode of the invention, an oxygen concentration of between approximately 0.1% and approximately 1% is maintained in the furnace
In accordance with an added mode of the invention, an oxygen concentration of between approximately 1% and approximately 10% is maintained in the furnace.
In accordance with an additional mode of the invention, the oxygen concentration in the furnace is less than 1%. Such a concentration enables the formation of silicon monoxide and suppresses the formation of silicon dioxide. The formation of silicon monoxide is remarkable at an oxygen concentration of higher than 0.1% of oxygen in the process gas.
In accordance with yet another mode of the invention, the annealing of the substrate is performed for a period of between 5 and 40 seconds. A preferred time period is about 30 seconds.
In accordance with yet a further mode of the invention, the substrate is etched in a solution containing water, ammonium hydroxide, and hydrogen peroxide (H2O, NH4OH, and H2O2) to smooth the mesopores. Such a process provides pores with improved regularity and avoids corners. It also widens the pores.
In accordance with yet an added mode of the invention, the substrate is etched several times in the above-mentioned solution to smooth the mesopores. The etching provides pores with improved regularity and avoids corners. It also widens the pores.
In accordance with yet an additional mode of the invention, the mesopores are formed having a diameter between 10 nm and 50 nm (nm=Nanometers). The given range for the diameter of the mesopores is suitable for enlarging the area of the capacitor in a way that improves the capacity of the storage capacitor.
In accordance with again another mode of the invention, the ratio between diameter and depth of the mesopores is between 0.25 and 4.
In accordance with again a further mode of the invention, the process parameters for oxidizing the silicon containing substrate are chosen such that the silicon containing substrate is oxidized to silicon monoxide, which is volatile and sublimates from the surface of the semiconductor substrate. As a result, the surface of the semiconductor substrate is roughened due to oxidation to silicon monoxide, which is, afterwards, sublimated due to the high temperature of between 950xc2x0 C. and 1200xc2x0 C.
With the objects of the invention in view, there is also provided a method for roughening a surface of a semiconductor substrate, including the steps of providing a semiconductor substrate having a surface, placing the semiconductor substrate in a furnace, introducing a process gas into the furnace, the process gas including oxygen and an inert gas, maintaining an oxygen concentration below approximately 10% in the furnace, and forming mesopores in the surface of the semiconductor substrate by annealing the substrate at a temperature between approximately 950xc2x0 C. and approximately 1200xc2x0 C.
With the objects of the invention in view, there is also provided a method for roughening a surface of a semiconductor substrate, including the steps of providing a semiconductor substrate having a surface, placing the semiconductor substrate in a furnace, introducing a process gas into the furnace, the process gas including oxygen and an inert gas selected from the group consisting of argon and nitrogen, maintaining an oxygen concentration below approximately 10% in the furnace, and forming mesopores in the surface of the semiconductor substrate by annealing the substrate at a temperature between approximately 950xc2x0 C. and approximately 1200xc2x0 C.
Other features that are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for roughening a surface of a semiconductor substrate, it is, nevertheless, not intended to be limited to the details shown because various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.